International Conference on IC Design and Technology

Tutorial Program

Tutorial Program

The whole day on Monday, June 4th, 2018 is devoted to tutorials.

A certificate of attendance will be issued to all tutorial participants.
Participants requiring also the certification of academic credits for the tutorials have to go through an exam (questionnaire) at the end of the tutorial program.

The tutorial program is the following:

08:30–10:30 – Tutorial 1

ReRAM-Based Analog Synapse Devices for Neuromorphic System

Prof. Hyunsang Hwang, Pohang University of Science and Technology (POSTECH), Korea

To overcome the intrinsic limitations of von Neumann computing system with information bottleneck between memory and CPU, we need to develop neuromorphic computing system based on hardware artificial neural network (ANN). The ANN system with high density synapse devices can perform massive parallel computing for pattern recognition with low power consumption. To implement neuromorphic system with on-chip learning capability, we need to develop ideal synapse device with various device requirements such as scalability, multi-level cell (MLC) characteristics, low power operation, data retention, and symmetric and linear conductance change under potentiation/depression modes. Although various devices such as ReRAM, PRAM, and MRAM were proposed for synapse applications, these devices have intrinsic limitations for neuromorphic synapse application. This talk covers various ReRAM synapse devices such as filamentary switching ReRAM (HfOx, TaOx, Cu-CBRAM) with MLC characteristics, interface switching ReRAM (Pr0.7Ca0.3MnO3, TiOx) with analog memory characteristics, and HfZrOx ferroelectric device. By optimizing forming and potentiation/depression conditions, we could improve conductance linearity and MLC characteristics of filamentary synapse device. Interface ReRAM has better MLC characteristics with limited retention and conductance linearity. By controlling the reactivity of metal electrode and oxygen concentration in oxide, we can modulate the retention characteristics. Ferroelectric device based on HfZrOx film exhibits good retention characteristics but it requires 3-terminal device. To overcome the limitation of conventional CMOS neuron, we have investigated NbO2-IMT device for oscillator neuron applications. We have confirmed feasibility of pattern recognition using IMT oscillator device. Based on various synapse device characteristics, we have estimated the pattern recognition accuracy of MNIST handwritten digits and CIFAR-10 dataset. We have confirmed that synapse device characteristics directly affect pattern recognition accuracy.

Hyunsang Hwang received the B. Sc. degree in Metallurgical Engineering from Seoul National University, Korea in 1988, and the Ph. D. degree in Materials Science and Engineering form University of Texas at Austin, USA in 1992. He is Professor at the Department of Materials Science and Engineering of Pohang University of Science and Technology (POSTECH), Korea.

10:30–10:45 – Coffee Break

10:45–12:45 – Tutorial 2

Switched-Capacitor DC-DC Converters

Prof. Piero Malcovati, University of Pavia, Italy

Switched-capacitor DC-DC converters represent a promising alternative to conventional inductor based topologies. They basically exploit capacitors and switches to convert one DC voltage to another and, therefore, they do not require any magnetic component, thus enabling the possibility of a fully-integrated implementation. Switched-capacitor DC-DC converters are intrinsically more effective in the utilization of switches and passive elements than their inductive counterparts. In the first part of the lecture, the basic theory of switched-capacitor DC-DC converters is analyzed, deriving the basic analytical expressions for the most important design parameter, such as conversion ratio, output impedance, efficiency, and discussing the most important non-idealities. Then, the state-of-the-art of switched-capacitor DC-DC converters implemented either with external or integrated capacitors is reviewed. Finally, a few actual examples are considered in detail, illustrating the most important design aspects and tricks, as well as the achieved performance.

Piero Malcovati received the M. Sc. degree in Electronics from University of Pavia, Italy in 1991, and the Ph. D. degree in Electrical Engineering form ETH Zurich, Switzerland in 1996. He is Professor at the Department of Electrical, Computer, and Biomedical Engineering of University of Pavia, Italy.

12:45–13:45 – Lunch

13:45–15:45 – Tutorial 3

Physical and Statistical Analysis and Methodologies for Realizing Automotive-Level Extremely Low Defect Densities (FEOL/MOL/BEOL)

Prof. Shinji Yokogawa, University of Electro-Communications (UEC), Tokyo, Japan

The defect impacts for lifetime distribution will be discussed both physical and statistical aspects. The analysis of early failure can provide targets for defect control and screening condition. In this tutorial, the physical and the statistical techniques of lifetime estimation will be introduced about FEOL/MOL/BEOL segments from a perspective of yield and reliability defects. Recent proposed statistical modeling of lifetime distribution and its applications will provide valuable information to both process technology developments and circuit design. Moreover, new concepts of reliable design are required in various fields, e.g., storage class memories, automotive, and energy device, recently. Some reliability efforts for the requirements will be focused in the lecture.

Shinji Yokogawa received the M. Sc. degree in 1994 and the Ph. D. degree in 2008 in Engineering form the University of Electro-Communications (UEC), Tokyo, Japan. He is Associate Professor at the Info-Powered Energy System Research Center of the University of Electro-Communications (UEC), Tokyo, Japan.

15:45–16:00 – Coffee Break

16:00–18:00 – Tutorial 4

Physics-Based Modeling of Novel Devices for Nonvolatile Memories

Prof. Daniele Ilemini, Politecnico di Milano, Italy

The surge of the Internet of Things (IoT) is raising the need for embedded memory technologies with BEOL process, CMOS compatibility, low energy consumption and high performance. Memory devices such as the phase change memory (PCM), the resistive switching memory (RRAM), the ferroelectric memory (FeRAM), and the spin transfer torque magnetic memory (STTRAM) are thus scrutinized as potential candidates for systems on chip (SoC), such as microcontroller units (MCU) and smart sensors. An accurate assessment of each technology requires a detailed physical understanding of the switching mechanisms, the reliability limits, and the device scalability. This tutorial will provide an overview of the embedded memory technologies, covering the principle of operation, the main architecture, and the scaling. The memory technologies will be compared with reference to the specific requirements of embedded nonvolatile memory (eNVM) applications, such as low energy, high speed, and stability at high temperature. Novel in-memory computing functions, such as physical unclonable functions, true random number generations, and neuromorphic computing, will be reviewed and discussed.

Daniele Ilemini received the M. Sc. degree in Nuclear Engineering in 1995 and the Ph. D. degree in Nuclear Engineering in 2000 form Politecnico di Milano, Italy. He is Professor at the Dipartimento di Elettronica, Informazione e Bioingegneria (DEIB) of Politecnico di Milano, Italy.